Apple's first 2-nanometer chip and its first quad-die chip landed the same morning, in an $899 box and a $5,499 box. Below is where they sit against everything else you could put on a desk — and why the axis that decides the winner is the one Apple mentions last.
Both axes are logarithmic. Pick a model and a dashed wall appears at its weight size: every machine to the left of that wall is disqualified no matter how fast it is. Height above the wall sets how many tokens per second come out. Hover or tap any point.
This is the first time Apple has run a mixed lineup: the cheapest machine gets the newest silicon and the most expensive machine gets last generation's, scaled up. The Mac mini pairs a brand-new M6 with an M5 Pro one tier up. The Mac Studio pairs M5 Max with M5 Ultra. There is no M6 Pro, no M6 Max, no M6 Ultra.
All performance figures here are Apple's own, measured by Apple in August 2026 on preproduction hardware. No independent benchmarks exist yet — the machines ship 22 September. Treat every multiplier as a ceiling.
Generating each token means re-reading the model's active weights out of memory. For one user at a time, that read is the bottleneck — not compute. So this single figure, more than core counts or TOPS, predicts how fast a local model feels once it's loaded. Linear scale, so the gaps are true gaps.
Off this chart by design: an H100 moves 3,350 GB/s and a B200 around 8,000 GB/s. They are not desk machines, they cost more than a car, and an H100 holds 80 GB against the M5 Ultra's 512 GB. Compute-bound work — prompt ingestion, image generation, fine-tuning — reorders this list substantially in NVIDIA's favour.
The first question is binary and unforgiving. A machine that can't hold the weights scores zero, however fast it is. Only then does bandwidth matter. Numbers below are roofline estimates at 4-bit. Dense models land at roughly 70–90% of them in practice; sparse mixture-of-experts models often land nearer half, because the roofline ignores routing, attention and KV-cache traffic.
Mixture-of-experts models activate a fraction of their weights per token, so a 671B MoE generates faster than a 70B dense model once it fits — but it still needs the whole thing resident. That gap between "total size" and "active size" is why the capacity axis and the speed axis have to be read separately.
The base line is the one to watch. From M1 to M6, Apple moved the entry chip from 68 to 170 GB/s across four process nodes — real progress, but a slower curve than the one local models have been climbing. The Ultra line tells a different story: flat from 2022 to 2025, then a 50% jump in a single generation, and the first Ultra ever to skip a generation number. Apple never built an M4 Ultra.
Six claims, each with what's genuinely new underneath it and what the claim quietly leaves out.
Apple leads the industry onto TSMC's N2 node, as it has at every node since 7 nm.
Being first to a node is a supply-chain achievement more than a design one, but it's not nothing: Apple's volume commitments are what make new nodes economically viable, and it's why the rest of the industry gets 2 nm in 2027 rather than 2029. Density also let Apple add two CPU cores and two GPU cores without growing the die.
Substantively firstA full node shrink plus 20% more cores bought 1.2× multithreaded performance. That's a modest return, and it tells you where 2 nm's gains actually went: efficiency and density, not speed. The era where a new node meant a step change in performance ended a while ago, and M6 is a clean illustration.
Underwhelming payoffM5 Ultra fuses two dual-die M5 Max packages over UltraFusion at 4.4 TB/s.
This is the most technically interesting thing announced. Making four dies present themselves to software as one processor — one memory space, no NUMA tax visible to the developer — is hard, and Apple has now done it at a scale nobody else attempts in a desktop. It also means Apple can keep scaling by gluing rather than by building ever-larger reticle-limited dies.
Genuinely novelApple's own history says the abstraction leaks. M1 Ultra's two-die fusion never delivered the clean 2× scaling the marketing implied, and multi-die GPU work has historically underperformed on Metal. Four dies double the number of places that can go wrong. Wait for third-party scaling tests before believing the seam is invisible.
Unverified in practiceEnabled by a new third core type, the "super core," above performance and efficiency cores.
A three-tier core hierarchy in a consumer chip is a real architectural move — Apple has split what used to be one performance-core design into a small number of very wide, very expensive cores and a larger number of cheaper ones. If the claim holds it's a meaningful lead, since Apple's M4 Max already held the single-core crown against Intel and AMD's flagships at a fraction of the power.
Probably trueApple compared against "shipping competitive systems" without naming them, and Intel's Nova Lake and AMD's Zen 6 desktop parts are both due imminently. More to the point: single-threaded speed is nearly irrelevant to the workload this whole launch is pitched at. Nobody's local model runs faster because one core got wider.
Wrong metric for the pitch50% more bandwidth than M3 Ultra, at the same maximum capacity.
This is the actual headline, and it's the one Apple buried. Nothing else you can buy combines this much memory with this much bandwidth. An H100 has four times the bandwidth and one sixth the capacity. A DGX Spark has a quarter of the capacity and a fifth of the bandwidth. Frontier open-weight models in the 400–700B range now fit, in one box, quietly, under a desk.
Category-definingThe 512 GB configuration doesn't ship until late October and the entry Ultra is 96 GB — the tier that actually holds a 671B model is deep into five figures. And 1.2 TB/s across 400 GB of weights is still a slow read: fitting a huge model and running it usefully are different achievements. Prompt processing, which is compute-bound rather than bandwidth-bound, remains Apple's weakest axis against CUDA.
Fits ≠ usableTwo NPUs running concurrently, up to 2× the peak compute of the previous single engine.
The interesting detail is that system frameworks schedule across both automatically, so apps get the second engine without being rewritten. Doubling a block rather than redesigning it is the pragmatic move when you've just spent your transistor budget on a node transition.
Sensible, not radicalThe Neural Engine is largely beside the point for the workload people care about. Local LLM inference on Macs runs on the GPU, through Metal, in llama.cpp and MLX — the NPU can't reach full memory bandwidth and mostly serves Apple Intelligence and CoreML apps. M5 Ultra doesn't even get the dual engine; it carries the old 32-core design.
Marketing surfaceM6 base ships alongside M5 Pro, M5 Max and M5 Ultra. No M6 Pro or Max is planned.
From M1 through M5, Apple shipped a generation as a family. That cadence is now gone, and reporting before the launch suggested Apple decided the next generation's gains were worth skipping most of the M6 tier for. Structurally this is the biggest change here: Apple silicon is becoming a rolling set of independently-refreshed tiers rather than annual families.
Quietly the big oneIt makes buying advice incoherent. The $899 machine has the newer, more efficient, more capable-per-core chip; the $5,499 machine has last year's architecture on an older node with four times the die area. Both claims — "our newest silicon" and "our most powerful chip ever" — are true, of different products, and no chart Apple published puts them on the same axis.
Confusing by constructionNo, and it's worth being clear about why. M1 was a discontinuity — an architecture switch that made laptops two to three times more efficient overnight and stranded a decade of x86 assumptions. Nothing here does that. M6 is a competent node transition with a modest performance return. M5 Ultra is a packaging achievement wrapped around a year-old core design.
The significance sits somewhere else. Over six years Apple built, more or less incidentally, the only mass-market architecture where a large pool of memory and a fast path to it live on the same package. That was a battery-life decision in 2020. In 2026 it turns out to be the shape of machine you need to run a frontier open-weight model privately, and Apple has a five-year head start on a category it didn't set out to enter. NVIDIA's answer is a $4,700 box with 128 GB. AMD's is a $2,000 box with 128 GB. Apple's is 512 GB.
Which means the honest verdict is split by tier. M6 is a good Mac mini chip and a footnote. M5 Ultra is the first machine that makes running a 671-billion-parameter model at home a purchase decision rather than a research project — and that is a threshold worth marking, even if the silicon crossing it is a generation old.